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aar4.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
build.lua
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inn works now; add a helper for it.
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2016-11-20 12:53:44 +01:00 |
cfi8.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
cfu8.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
cif8.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
csa.s
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Made csa and csb work with mcg; adjust the libem functions and the
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2016-11-19 10:55:41 +01:00 |
csb.s
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Made csa and csb work with mcg; adjust the libem functions and the
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2016-11-19 10:55:41 +01:00 |
cuf8.s
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Rename our pseudo-opcode 'la' to 'li32'.
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2016-09-18 17:03:23 -04:00 |
fd_00000000.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
fd_80000000.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
fd_FFFFFFFF.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
fef8.s
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Rewrite fef 8 in powerpc assembly.
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2016-09-29 15:52:54 -04:00 |
fif8.s
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Rewrite .fif8 to avoid powerpc64 fctid
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2016-10-17 00:39:59 -04:00 |
inn.s
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inn works now; add a helper for it.
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2016-11-20 12:53:44 +01:00 |
lar4.s
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Add the missing .lar4 and .sar4 for powerpc.
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2016-09-17 23:55:55 -04:00 |
los.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
powerpc.h
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Eliminate the RELOH2 relocation, as it never worked --- the address would be
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2016-09-17 12:43:15 +02:00 |
ret.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
sar4.s
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Add the missing .lar4 and .sar4 for powerpc.
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2016-09-17 23:55:55 -04:00 |
sts.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |
tge.s
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Archival checkin (semi-working code).
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2007-11-02 18:56:58 +00:00 |