x86_64: fix asm

This commit is contained in:
grischka 2009-11-14 21:48:37 +01:00
parent 0a3bcb57f6
commit 1383055b17
3 changed files with 19 additions and 14 deletions

View file

@ -117,14 +117,14 @@ typedef struct Operand {
ExprValue e; ExprValue e;
} Operand; } Operand;
static const uint8_t reg_to_size[7] = { static const uint8_t reg_to_size[9] = {
/* /*
[OP_REG8] = 0, [OP_REG8] = 0,
[OP_REG16] = 1, [OP_REG16] = 1,
[OP_REG32] = 2, [OP_REG32] = 2,
[OP_REG64] = 3, [OP_REG64] = 3,
*/ */
0, 0, 1, 0, 2, 0, 3 0, 0, 1, 0, 2, 0, 0, 0, 3
}; };
#define NB_TEST_OPCODES 30 #define NB_TEST_OPCODES 30
@ -493,23 +493,22 @@ static void asm_opcode(TCCState *s1, int opcode)
if (!((unsigned)v < 8 * 6 && (v % 6) == 0)) if (!((unsigned)v < 8 * 6 && (v % 6) == 0))
continue; continue;
} else if (pa->instr_type & OPC_ARITH) { } else if (pa->instr_type & OPC_ARITH) {
if (!(opcode >= pa->sym && opcode < pa->sym + 8 * 4)) if (!(opcode >= pa->sym && opcode < pa->sym + 8 * 5))
continue; continue;
goto compute_size; s = (opcode - pa->sym) % 5;
} else if (pa->instr_type & OPC_SHIFT) { } else if (pa->instr_type & OPC_SHIFT) {
if (!(opcode >= pa->sym && opcode < pa->sym + 7 * 4)) if (!(opcode >= pa->sym && opcode < pa->sym + 7 * 5))
continue; continue;
goto compute_size; s = (opcode - pa->sym) % 5;
} else if (pa->instr_type & OPC_TEST) { } else if (pa->instr_type & OPC_TEST) {
if (!(opcode >= pa->sym && opcode < pa->sym + NB_TEST_OPCODES)) if (!(opcode >= pa->sym && opcode < pa->sym + NB_TEST_OPCODES))
continue; continue;
} else if (pa->instr_type & OPC_B) { } else if (pa->instr_type & OPC_B) {
if (!(opcode >= pa->sym && opcode <= pa->sym + 3)) if (!(opcode >= pa->sym && opcode < pa->sym + 5))
continue; continue;
compute_size: s = opcode - pa->sym;
s = (opcode - pa->sym) & 3;
} else if (pa->instr_type & OPC_WLQ) { } else if (pa->instr_type & OPC_WLQ) {
if (!(opcode >= pa->sym && opcode <= pa->sym + 2)) if (!(opcode >= pa->sym && opcode < pa->sym + 4))
continue; continue;
s = opcode - pa->sym + 1; s = opcode - pa->sym + 1;
} else { } else {
@ -589,7 +588,11 @@ static void asm_opcode(TCCState *s1, int opcode)
s = 1; s = 1;
else if (s == 3) { else if (s == 3) {
/* generate REX prefix */ /* generate REX prefix */
g(rex); if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) &&
(ops[0].type & OP_REG64))
;
else
g(rex);
s = 1; s = 1;
} }
/* now generates the operation */ /* now generates the operation */
@ -616,7 +619,7 @@ static void asm_opcode(TCCState *s1, int opcode)
nb_ops = 0; nb_ops = 0;
} else if (v <= 0x05) { } else if (v <= 0x05) {
/* arith case */ /* arith case */
v += ((opcode - TOK_ASM_addb) >> 2) << 3; v += ((opcode - TOK_ASM_addb) / 5) << 3;
} else if ((pa->instr_type & (OPC_FARITH | OPC_MODRM)) == OPC_FARITH) { } else if ((pa->instr_type & (OPC_FARITH | OPC_MODRM)) == OPC_FARITH) {
/* fpu arith case */ /* fpu arith case */
v += ((opcode - pa->sym) / 6) << 3; v += ((opcode - pa->sym) / 6) << 3;
@ -673,11 +676,11 @@ static void asm_opcode(TCCState *s1, int opcode)
/* search which operand will used for modrm */ /* search which operand will used for modrm */
modrm_index = 0; modrm_index = 0;
if (pa->instr_type & OPC_SHIFT) { if (pa->instr_type & OPC_SHIFT) {
reg = (opcode - pa->sym) >> 2; reg = (opcode - pa->sym) / 5;
if (reg == 6) if (reg == 6)
reg = 7; reg = 7;
} else if (pa->instr_type & OPC_ARITH) { } else if (pa->instr_type & OPC_ARITH) {
reg = (opcode - pa->sym) >> 2; reg = (opcode - pa->sym) / 5;
} else if (pa->instr_type & OPC_FARITH) { } else if (pa->instr_type & OPC_FARITH) {
reg = (opcode - pa->sym) / 6; reg = (opcode - pa->sym) / 6;
} else { } else {

View file

@ -109,6 +109,7 @@ ALT(DEF_ASM_OP2(movw, 0x0f26, 0, OPC_MODRM | OPC_WLQ, OPT_REG64, OPT_TR))
ALT(DEF_ASM_OP2(movsbl, 0x0fbe, 0, OPC_MODRM, OPT_REG8 | OPT_EA, OPT_REG32)) ALT(DEF_ASM_OP2(movsbl, 0x0fbe, 0, OPC_MODRM, OPT_REG8 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(movsbw, 0x0fbe, 0, OPC_MODRM | OPC_D16, OPT_REG8 | OPT_EA, OPT_REG16)) ALT(DEF_ASM_OP2(movsbw, 0x0fbe, 0, OPC_MODRM | OPC_D16, OPT_REG8 | OPT_EA, OPT_REG16))
ALT(DEF_ASM_OP2(movswl, 0x0fbf, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32)) ALT(DEF_ASM_OP2(movswl, 0x0fbf, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(movslq, 0x4863, 0, OPC_MODRM, OPT_REG32 | OPT_EA, OPT_REG))
ALT(DEF_ASM_OP2(movzbw, 0x0fb6, 0, OPC_MODRM | OPC_WL, OPT_REG8 | OPT_EA, OPT_REGW)) ALT(DEF_ASM_OP2(movzbw, 0x0fb6, 0, OPC_MODRM | OPC_WL, OPT_REG8 | OPT_EA, OPT_REGW))
ALT(DEF_ASM_OP2(movzwl, 0x0fb7, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32)) ALT(DEF_ASM_OP2(movzwl, 0x0fb7, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32))

View file

@ -146,6 +146,7 @@
DEF_ASM(movsbw) DEF_ASM(movsbw)
DEF_ASM(movsbl) DEF_ASM(movsbl)
DEF_ASM(movswl) DEF_ASM(movswl)
DEF_ASM(movslq)
DEF_WLQ(lea) DEF_WLQ(lea)