arm-asm: Implement asm_compute_constraints
This commit is contained in:
Danny Milosavljevic
parent
795d7d5ce6
commit
9a460d3234
1 changed files with 286 additions and 0 deletions
286
arm-asm.c
286
arm-asm.c
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@ -1330,11 +1330,297 @@ ST_FUNC void asm_gen_code(ASMOperand *operands, int nb_operands,
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}
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}
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}
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}
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/* return the constraint priority (we allocate first the lowest
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numbered constraints) */
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static inline int constraint_priority(const char *str)
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{
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int priority, c, pr;
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/* we take the lowest priority */
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priority = 0;
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for(;;) {
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c = *str;
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if (c == '\0')
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break;
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str++;
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switch(c) {
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case 'l': // in ARM mode, that's an alias for 'r' [ARM].
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case 'r': // register [general]
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case 'p': // valid memory address for load,store [general]
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pr = 3;
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break;
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case 'M': // integer constant for shifts [ARM]
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case 'I': // integer valid for data processing instruction immediate
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case 'J': // integer in range -4095...4095
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case 'i': // immediate integer operand, including symbolic constants [general]
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case 'm': // memory operand [general]
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case 'g': // general-purpose-register, memory, immediate integer [general]
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pr = 4;
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break;
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default:
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tcc_error("unknown constraint '%c'", c);
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pr = 0;
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}
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if (pr > priority)
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priority = pr;
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}
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return priority;
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}
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static const char *skip_constraint_modifiers(const char *p)
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{
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/* Constraint modifier:
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= Operand is written to by this instruction
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+ Operand is both read and written to by this instruction
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% Instruction is commutative for this operand and the following operand.
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Per-alternative constraint modifier:
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& Operand is clobbered before the instruction is done using the input operands
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*/
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while (*p == '=' || *p == '&' || *p == '+' || *p == '%')
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p++;
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return p;
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}
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#define REG_OUT_MASK 0x01
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#define REG_IN_MASK 0x02
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#define is_reg_allocated(reg) (regs_allocated[reg] & reg_mask)
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ST_FUNC void asm_compute_constraints(ASMOperand *operands,
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ST_FUNC void asm_compute_constraints(ASMOperand *operands,
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int nb_operands, int nb_outputs,
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int nb_operands, int nb_outputs,
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const uint8_t *clobber_regs,
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const uint8_t *clobber_regs,
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int *pout_reg)
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int *pout_reg)
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{
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{
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/* overall format: modifier, then ,-seperated list of alternatives; all operands for a single instruction must have the same number of alternatives */
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/* TODO: Simple constraints
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whitespace ignored
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o memory operand that is offsetable
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V memory but not offsetable
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< memory operand with autodecrement addressing is allowed. Restrictions apply.
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> memory operand with autoincrement addressing is allowed. Restrictions apply.
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n immediate integer operand with a known numeric value
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E immediate floating operand (const_double) is allowed, but only if target=host
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F immediate floating operand (const_double or const_vector) is allowed
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s immediate integer operand whose value is not an explicit integer
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X any operand whatsoever
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0...9 (postfix); (can also be more than 1 digit number); an operand that matches the specified operand number is allowed
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*/
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/* TODO: ARM constraints:
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k the stack pointer register
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G the floating-point constant 0.0
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Q memory reference where the exact address is in a single register ("m" is preferable for asm statements)
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R an item in the constant pool
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S symbol in the text segment of the current file
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[ Uv memory reference suitable for VFP load/store insns (reg+constant offset)]
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[ Uy memory reference suitable for iWMMXt load/store instructions]
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Uq memory reference suitable for the ARMv4 ldrsb instruction
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*/
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ASMOperand *op;
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int sorted_op[MAX_ASM_OPERANDS];
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int i, j, k, p1, p2, tmp, reg, c, reg_mask;
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const char *str;
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uint8_t regs_allocated[NB_ASM_REGS];
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/* init fields */
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for (i = 0; i < nb_operands; i++) {
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op = &operands[i];
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op->input_index = -1;
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op->ref_index = -1;
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op->reg = -1;
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op->is_memory = 0;
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op->is_rw = 0;
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}
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/* compute constraint priority and evaluate references to output
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constraints if input constraints */
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for (i = 0; i < nb_operands; i++) {
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op = &operands[i];
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str = op->constraint;
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str = skip_constraint_modifiers(str);
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if (isnum(*str) || *str == '[') {
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/* this is a reference to another constraint */
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k = find_constraint(operands, nb_operands, str, NULL);
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if ((unsigned) k >= i || i < nb_outputs)
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tcc_error("invalid reference in constraint %d ('%s')",
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i, str);
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op->ref_index = k;
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if (operands[k].input_index >= 0)
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tcc_error("cannot reference twice the same operand");
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operands[k].input_index = i;
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op->priority = 5;
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} else if ((op->vt->r & VT_VALMASK) == VT_LOCAL
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&& op->vt->sym
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&& (reg = op->vt->sym->r & VT_VALMASK) < VT_CONST) {
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op->priority = 1;
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op->reg = reg;
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} else {
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op->priority = constraint_priority(str);
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}
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}
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/* sort operands according to their priority */
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for (i = 0; i < nb_operands; i++)
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sorted_op[i] = i;
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for (i = 0; i < nb_operands - 1; i++) {
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for (j = i + 1; j < nb_operands; j++) {
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p1 = operands[sorted_op[i]].priority;
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p2 = operands[sorted_op[j]].priority;
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if (p2 < p1) {
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tmp = sorted_op[i];
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sorted_op[i] = sorted_op[j];
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sorted_op[j] = tmp;
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}
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}
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}
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for (i = 0; i < NB_ASM_REGS; i++) {
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if (clobber_regs[i])
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regs_allocated[i] = REG_IN_MASK | REG_OUT_MASK;
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else
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regs_allocated[i] = 0;
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}
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/* sp cannot be used */
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regs_allocated[13] = REG_IN_MASK | REG_OUT_MASK;
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/* fp cannot be used yet */
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regs_allocated[11] = REG_IN_MASK | REG_OUT_MASK;
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/* allocate registers and generate corresponding asm moves */
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for (i = 0; i < nb_operands; i++) {
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j = sorted_op[i];
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op = &operands[j];
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str = op->constraint;
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/* no need to allocate references */
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if (op->ref_index >= 0)
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continue;
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/* select if register is used for output, input or both */
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if (op->input_index >= 0) {
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reg_mask = REG_IN_MASK | REG_OUT_MASK;
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} else if (j < nb_outputs) {
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reg_mask = REG_OUT_MASK;
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} else {
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reg_mask = REG_IN_MASK;
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}
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if (op->reg >= 0) {
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if (is_reg_allocated(op->reg))
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tcc_error
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("asm regvar requests register that's taken already");
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reg = op->reg;
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goto reg_found;
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}
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try_next:
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c = *str++;
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switch (c) {
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case '=': // Operand is written-to
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goto try_next;
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case '+': // Operand is both READ and written-to
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op->is_rw = 1;
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/* FALL THRU */
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case '&': // Operand is clobbered before the instruction is done using the input operands
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if (j >= nb_outputs)
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tcc_error("'%c' modifier can only be applied to outputs",
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c);
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reg_mask = REG_IN_MASK | REG_OUT_MASK;
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goto try_next;
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case 'l': // In non-thumb mode, alias for 'r'--otherwise r0-r7 [ARM]
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case 'r': // general-purpose register
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case 'p': // loadable/storable address
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/* any general register */
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for (reg = 0; reg <= 8; reg++) {
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if (!is_reg_allocated(reg))
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goto reg_found;
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}
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goto try_next;
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reg_found:
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/* now we can reload in the register */
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op->is_llong = 0;
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op->reg = reg;
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regs_allocated[reg] |= reg_mask;
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break;
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case 'I': // integer that is valid as an data processing instruction immediate (0...255, rotated by a multiple of two)
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case 'J': // integer in the range -4095 to 4095 [ARM]
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case 'K': // integer that satisfies constraint I when inverted (one's complement)
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case 'L': // integer that satisfies constraint I when inverted (two's complement)
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case 'i': // immediate integer operand, including symbolic constants
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if (!((op->vt->r & (VT_VALMASK | VT_LVAL)) == VT_CONST))
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goto try_next;
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break;
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case 'M': // integer in the range 0 to 32
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if (!
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((op->vt->r & (VT_VALMASK | VT_LVAL | VT_SYM)) ==
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VT_CONST))
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goto try_next;
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break;
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case 'm': // memory operand
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case 'g':
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/* nothing special to do because the operand is already in
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memory, except if the pointer itself is stored in a
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memory variable (VT_LLOCAL case) */
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/* XXX: fix constant case */
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/* if it is a reference to a memory zone, it must lie
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in a register, so we reserve the register in the
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input registers and a load will be generated
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later */
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if (j < nb_outputs || c == 'm') {
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if ((op->vt->r & VT_VALMASK) == VT_LLOCAL) {
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/* any general register */
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for (reg = 0; reg <= 8; reg++) {
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if (!(regs_allocated[reg] & REG_IN_MASK))
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goto reg_found1;
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}
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goto try_next;
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reg_found1:
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/* now we can reload in the register */
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regs_allocated[reg] |= REG_IN_MASK;
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op->reg = reg;
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op->is_memory = 1;
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}
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}
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break;
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default:
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tcc_error("asm constraint %d ('%s') could not be satisfied",
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j, op->constraint);
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break;
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}
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/* if a reference is present for that operand, we assign it too */
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if (op->input_index >= 0) {
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operands[op->input_index].reg = op->reg;
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operands[op->input_index].is_llong = op->is_llong;
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}
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}
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/* compute out_reg. It is used to store outputs registers to memory
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locations references by pointers (VT_LLOCAL case) */
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*pout_reg = -1;
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for (i = 0; i < nb_operands; i++) {
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op = &operands[i];
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if (op->reg >= 0 &&
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(op->vt->r & VT_VALMASK) == VT_LLOCAL && !op->is_memory) {
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for (reg = 0; reg <= 8; reg++) {
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if (!(regs_allocated[reg] & REG_OUT_MASK))
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goto reg_found2;
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}
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tcc_error("could not find free output register for reloading");
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reg_found2:
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*pout_reg = reg;
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break;
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}
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}
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/* print sorted constraints */
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#ifdef ASM_DEBUG
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for (i = 0; i < nb_operands; i++) {
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j = sorted_op[i];
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op = &operands[j];
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printf("%%%d [%s]: \"%s\" r=0x%04x reg=%d\n",
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j,
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op->id ? get_tok_str(op->id, NULL) : "",
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op->constraint, op->vt->r, op->reg);
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}
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if (*pout_reg >= 0)
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printf("out_reg=%d\n", *pout_reg);
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#endif
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}
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}
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ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str)
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ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str)
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