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x86_64-asm: support endbr64 instruction

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endbr64 has no operand but comes with a ModR/M byte. Handle it in the
same way as *fence instructions.

Co-authored-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: John Nunley <dev@notgull.net>
This commit is contained in:
John Nunley 2024-10-27 15:33:23 -07:00
parent 6acf301e77
commit a21b5f1fd7
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GPG key ID: E53E674BF0AA7116
2 changed files with 12 additions and 3 deletions
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12
i386-asm.c
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@ -1002,15 +1002,21 @@ again:
modrm_index = -1;
modreg_index = -1;
if (pa->instr_type & OPC_MODRM) {
#ifdef TCC_TARGET_X86_64
if (!nb_ops) {
/* A modrm opcode without operands is a special case (e.g. mfence).
It has a group and acts as if there's an register operand 0
(ax). */
It has a group and acts as if there's an register operand 0 */
i = 0;
ops[i].type = OP_REG;
ops[i].reg = 0;
if (pa->sym == TOK_ASM_endbr64)
ops[i].reg = 2; // dx
else if (pa->sym >= TOK_ASM_lfence && pa->sym <= TOK_ASM_sfence)
ops[i].reg = 0; // ax
else
tcc_error("bad MODR/M opcode without operands");
goto modrm_found;
}
#endif
/* first look for an ea operand */
for(i = 0;i < nb_ops; i++) {
if (op_type[i] & OP_EA)

3
x86_64-asm.h
View file

@ -538,6 +538,9 @@ ALT(DEF_ASM_OP2(movhps, 0x0f17, 0, OPC_MODRM, OPT_SSE, OPT_EA | OPT_REG32 ))
DEF_ASM_OP0L(mfence, 0x0fae, 6, OPC_MODRM)
DEF_ASM_OP0L(sfence, 0x0fae, 7, OPC_MODRM)
DEF_ASM_OP1(clflush, 0x0fae, 7, OPC_MODRM, OPT_EA)
/* Control-Flow Enforcement */
DEF_ASM_OP0L(endbr64, 0xf30f1e, 7, OPC_MODRM)
#undef ALT
#undef DEF_ASM_OP0
#undef DEF_ASM_OP0L