xv6-65oo2/mp.c

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// Multiprocessor bootstrap.
// Search memory for MP description structures.
// http://developer.intel.com/design/pentium/datashts/24201606.pdf
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#include "types.h"
#include "defs.h"
#include "param.h"
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#include "mp.h"
#include "x86.h"
#include "mmu.h"
#include "proc.h"
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struct cpu cpus[NCPU];
static struct cpu *bcpu;
int ismp;
int ncpu;
uchar ioapicid;
int
mpbcpu(void)
{
return bcpu-cpus;
}
static uchar
sum(uchar *addr, int len)
{
int i, sum;
sum = 0;
for(i=0; i<len; i++)
sum += addr[i];
return sum;
}
// Look for an MP structure in the len bytes at addr.
static struct mp*
mpsearch1(uchar *addr, int len)
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{
uchar *e, *p;
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cprintf("mpsearch1 0x%x %d\n", addr, len);
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e = addr+len;
for(p = addr; p < e; p += sizeof(struct mp))
if(memcmp(p, "_MP_", 4) == 0 && sum(p, sizeof(struct mp)) == 0)
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return (struct mp*)p;
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return 0;
}
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// Search for the MP Floating Pointer Structure, which according to the
// spec is in one of the following three locations:
// 1) in the first KB of the EBDA;
// 2) in the last KB of system base memory;
// 3) in the BIOS ROM between 0xE0000 and 0xFFFFF.
static struct mp*
mpsearch(void)
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{
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uchar *bda;
uint p;
struct mp *mp;
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bda = (uchar*)0x400;
if((p = ((bda[0x0F]<<8)|bda[0x0E]) << 4)){
if((mp = mpsearch1((uchar*)p, 1024)))
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return mp;
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} else {
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p = ((bda[0x14]<<8)|bda[0x13])*1024;
if((mp = mpsearch1((uchar*)p-1024, 1024)))
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return mp;
}
return mpsearch1((uchar*)0xF0000, 0x10000);
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}
// Search for an MP configuration table. For now,
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// don't accept the default configurations (physaddr == 0).
// Check for correct signature, calculate the checksum and,
// if correct, check the version.
// To do: check extended table checksum.
static struct mpconf*
mpconfig(struct mp **pmp)
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{
struct mpconf *conf;
struct mp *mp;
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if((mp = mpsearch()) == 0 || mp->physaddr == 0)
return 0;
conf = (struct mpconf*)mp->physaddr;
if(memcmp(conf, "PCMP", 4) != 0)
return 0;
if(conf->version != 1 && conf->version != 4)
return 0;
if(sum((uchar*)conf, conf->length) != 0)
return 0;
*pmp = mp;
return conf;
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}
void
mpinit(void)
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{
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uchar *p, *e;
struct mp *mp;
struct mpconf *conf;
struct mpproc *proc;
struct mpioapic *ioapic;
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bcpu = &cpus[0];
if((conf = mpconfig(&mp)) == 0)
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return;
ismp = 1;
lapic = (uint*)conf->lapicaddr;
for(p=(uchar*)(conf+1), e=(uchar*)conf+conf->length; p<e; ){
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switch(*p){
case MPPROC:
proc = (struct mpproc*)p;
if(ncpu != proc->apicid) {
cprintf("mpinit: ncpu=%d apicpid=%d", ncpu, proc->apicid);
panic("mpinit");
}
if(proc->flags & MPBOOT)
bcpu = &cpus[ncpu];
cpus[ncpu].id = ncpu;
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ncpu++;
p += sizeof(struct mpproc);
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continue;
case MPIOAPIC:
ioapic = (struct mpioapic*)p;
ioapicid = ioapic->apicno;
p += sizeof(struct mpioapic);
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continue;
case MPBUS:
case MPIOINTR:
case MPLINTR:
p += 8;
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continue;
default:
cprintf("mpinit: unknown config type %x\n", *p);
panic("mpinit");
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}
}
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if(mp->imcrp){
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// Bochs doesn't support IMCR, so this doesn't run on Bochs.
// But it would on real hardware.
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outb(0x22, 0x70); // Select IMCR
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outb(0x23, inb(0x23) | 1); // Mask external interrupts.
}
}