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Author SHA1 Message Date
David Given
4a3a9a98dc It doesn't really make a lot of sense to have BURG nonterminal names different 
to register classes, so combine them. Refactor the map code.
 2016-10-01 12:17:14 +02:00
David Given
3a973a19f3 Move fatal(), warning() and aprintf() into the new data module (because they're 
really useful).
 2016-09-30 19:10:30 +02:00
David Given
0d246c0d73 Much better handling of fragments (no run-time code needed to distinguish them 
from registers) and better handling of individual hops within a paragraph ---
no more ghastly hacks to try and distinguish the input from the output.
 2016-09-29 22:06:04 +02:00
David Given
a0131fdb47 You know what, the type inference stuff is a complete red herring. What this 
actually needs is a more intelligent register allocator. So, remove the type
inference.
 2016-09-29 19:58:02 +02:00
David Given
4572f1b774 Actually, I don't need vregs: hops work just as well. Particularly if I 
restructure things so that I don't need to walk the blasted ir / burg tree
every time I look at an instruction.
 2016-09-27 23:38:47 +02:00
David Given
e77c5164cf Fleshed out hops and vregs. The result is almost looking like code now --- 
uncanny.
 2016-09-27 00:19:45 +02:00
David Given
f552c9c7c6 Move map into the data module. 2016-09-26 23:03:04 +02:00
David Given
c4b8e00ae2 Revamp the array module not to use nasty macros any more. Slightly more verbose 
to use, but definitely cleaner.
 2016-09-26 22:48:58 +02:00
David Given
3671892c34 Move the array library into the data module. 2016-09-26 22:24:49 +02:00
David Given
cc176e5183 Keep more data around about ir instructions. Implement a half-baked type 
inference routine to propagate information about floats up the tree, so we know
whether to put floats into special registers as early as possible.
 2016-09-26 22:12:46 +02:00
David Given
416b13fd76 Start factoring out the hardware op code. 2016-09-25 23:29:59 +02:00
David Given
39aa672422 Sort of keep track of registers and register classes. Start walking the 
generated instruction tree --- holy cow, they look like instructions!
 2016-09-25 22:17:14 +02:00
David Given
bde5792b1a Collapse several rule arrays into one; actually generate the array properly. 2016-09-25 17:14:54 +02:00
David Given
67eb21d428 Rename struct insn to struct em (throughout). 2016-09-25 12:29:03 +02:00
David Given
9f78e0b36b Rethink the way patterns are mapped to rules; generate emitters (probably 
badly).
 2016-09-25 11:49:51 +02:00
David Given
7c028bdd45 We now record the code fragments to be emitted by each rule. 2016-09-25 00:21:46 +02:00
David Given
717b77dd0a Instruction selection is so important the file needs a longer name. 2016-09-24 22:50:53 +02:00
David Given
629e0ddfc6 Some instruction selection is now happening. 2016-09-24 22:46:08 +02:00
David Given
c8fcbe282a More grammar changes. 2016-09-24 19:03:55 +02:00
David Given
2acc4ed29d IR codes are now owned by mcgg; ir terminals are inserted into the table during 
compilation (so you can refer to them).
 2016-09-24 18:31:35 +02:00
David Given
1516657907 Crudely bolt on mcgg to mcg itself. 2016-09-24 17:20:40 +02:00
David Given
6643d39b2c Fix some late-night typo bugs. 2016-09-24 01:09:32 +02:00
David Given
bb9aa030a5 Procedure compilation now happens after the entire EM file has been read in (so 
that we can look inside data blocks which might be defined in the future...
sigh, csa and csb). csa and csb no longer generate invalid IR.
 2016-09-24 01:04:00 +02:00
David Given
ed67d427c9 Replaced the block splicer with a trivial block eliminator (which rewrites 
jumps to blocks which contain only a jump). Don't bother storing the bb graph
in the ir nodes; we can find it on demand by walking the tree instead ---
slower, but much easier to understand and more robust. Added a terrible map
library.
 2016-09-23 23:59:15 +02:00
David Given
f8bbf9e87d Each pass now lives in its own source file; much cleaner. 2016-09-23 21:07:16 +02:00
David Given
9077baa850 Add a bodged in algorithm for converting basic block communication from stacked 
variables to SSA. Also add dead block removal and block splicing. IR code is
much better now.
 2016-09-22 23:19:29 +02:00
David Given
6a74cb2e11 Tracing cleanup. Simplified the IR code. Some more opcodes. 2016-09-22 00:15:48 +02:00
David Given
4546dd5f22 Massive grammar overhaul and refactor. Hacked in support for predicates, where 
instructions can be turned on and off based on their parameters. New lexer
using a lexer. Now quite a lot of the way towards being a real instruction
selector.
 2016-09-21 00:43:10 +02:00
David Given
36d7d1ee4e Create hacky fake basic blocks for data fragments, used to track which 
instruction labels descriptor blocks refer to; this allows csa and csb to know
where they're going.
 2016-09-20 00:19:39 +02:00
David Given
dcba03646b Treebuilder now gets to the bottom of my test file, merrily generating 
(probably horribly broken) IR.
 2016-09-19 23:30:41 +02:00
David Given
6ce2495aeb Store the EM code up front and build the basic block graph *before* 
generating the IR code. Lots more IR code.
 2016-09-19 23:06:59 +02:00
David Given
176cd7365c Archival checking of the half-written IR treebuilder. 2016-09-18 23:24:54 +02:00
David Given
24380e2a93 Abstract out the EM reader; skeleton of the tree builder. 2016-09-18 00:02:16 +02:00
David Given
2eee391aef Basic skeleton of em parser. 2016-09-17 22:21:47 +02:00
David Given
f67c98e239 Distributions are a pain --- let's not bother any more. Instead, we just tag 
the repository and download a complete snapshot, old and ancient stuff and all.
 2016-09-02 23:00:38 +02:00
David Given
612e38f1c6 Remove the old make-based build system, plus some big chunks of horribly 
obsolete protomake build system.
 2016-09-02 22:17:51 +02:00
David Given
856eb120b3 Add files which got missed in the initial build pass. 2016-08-20 14:04:17 +02:00
David Given
204f932ed2 Raspberry Pi backend now builds. 2016-08-20 12:40:13 +02:00
David Given
4d24666432 Move util/data into modules/src/em_data, for consistency with the other 
modules.
 2016-08-14 14:09:38 +02:00
David Given
38fa6941d5 linux68k builds now. 2016-08-14 11:34:18 +02:00
David Given
f253b6a169 linux386 builds. Also, forgot to turn back on the language runtimes. 2016-08-14 10:37:55 +02:00
David Given
262c5fedcf Biggish refactor to break cycles; my build rules were full of them. cpm builds, 
which requires top and topgen.
 2016-08-14 01:39:40 +02:00
David Given
0d77cb8279 We can build our first C file. 2016-08-07 21:56:53 +02:00
David Given
b50dc4214a Add check for undefined variables. Find undefined variables. Fix undefined 
variables.
 2016-08-05 00:01:55 +02:00
David Given
5e84be70fd Massive ackbuilder refactor --- cleaner and more expressive. Lists 
are automatically flattened (leading to better build files), and the
list and filename functions are vastly more orthogonal.
 2016-08-04 23:51:19 +02:00
David Given
b2bb4ce3b2 Builds libend (the simplest library). Becoming obvious I need to rework the way 
ackbuilder deals with lists.
 2016-07-30 00:39:22 +02:00
David Given
a8a9d1bbfa yacc, ncgg; platform ncg builds now. 2016-07-26 23:35:30 +02:00
David Given
bff5c4019c Baby steps towards building a platform --- make the assembler work. 
Add ackbuilder support for C preprocessor files and yacc.
 2016-07-24 00:50:02 +02:00
David Given
88bd7ce126 Remove defunct pmfiles. 
--HG--
branch : default-branch
 2016-06-03 13:56:50 +02:00
David Given
ef8e6e25e0 Fix a whole pile of issues related to the failed attempt to increase 
the number of types of relocation possible in the object file. (Now,
hopefully, working.)

Also change the object serialiser/deserialiser to never try to read or
write raw structures; it's way safer this way and we don't need the
performance boost any more.

--HG--
branch : default-branch
 2016-03-18 21:46:55 +01:00
David Given
88e13ecce3 Don't use the ACK preprocessor on host files --- use the host preprocessor 
instead.

--HG--
branch : default-branch
 2016-03-14 20:58:19 +01:00
David Given
e85991ec86 Fix stray 'call file'. 
--HG--
branch : default-branch
 2016-03-13 21:40:05 +01:00
David Given
ff0c78cc78 Merge from default. 
--HG--
branch : dtrg-videocore-branch-branch
 2016-03-13 21:13:09 +01:00
David Given
62cc636f10 Merge. 
--HG--
branch : dtrg-videocore
 2015-03-23 00:15:42 +01:00
David Given
9f23fbbe6a Allow machines to use cg if they wish. 
--HG--
rename : mach/proto/ncg/build.mk => mach/proto/cg/build.mk
rename : util/ncgg/build.mk => util/cgg/build.mk
 2015-03-23 00:08:51 +01:00
David Given
c5018d7088 64-bit-ify (adhoc varargs are evil). 2015-03-23 00:07:59 +01:00
David Given
3d5e72e20b Newer versions of GNU Make have a new function which collides with a 
variable we're using; change the name of the variable.
 2015-03-22 12:09:46 +01:00
David Given
e36d739fa4 Add (largely untested) float/int conversion. 
--HG--
branch : dtrg-videocore
 2013-07-01 13:05:36 +01:00
David Given
8b6951dac0 Fix incorrect offset encoding in lea (sp) instructions. 
--HG--
branch : dtrg-videocore
 2013-06-29 00:35:07 +01:00
David Given
edb174da8d Fix incorrect encoding of 'push lr' and 'pop pc'. 
--HG--
branch : dtrg-videocore
 2013-06-29 00:32:39 +01:00
David Given
29af6f1adb ISA change: clz has been renamed to log2. 
--HG--
branch : dtrg-videocore
 2013-06-27 11:25:50 +01:00
David Given
2b3f95de0b Fix jump range checking in the addcmpb family of instructions. 
--HG--
branch : dtrg-videocore
 2013-06-26 23:32:54 +01:00
David Given
d94c1c8150 Updated distr files. 
--HG--
branch : dtrg-videocore
rename : mach/i80/.distr => mach/vc4/.distr
rename : plat/cpm/.distr => plat/rpi/.distr
 2013-06-21 23:38:21 +01:00
David Given
fd2360be0f Ship assembler man pages. 
--HG--
branch : dtrg-videocore
rename : man/8080_as.6 => man/i80_as.6
rename : man/m68k2_as.6 => man/m68020_as.6
 2013-06-21 23:20:50 +01:00
David Given
bbd4b46850 Fix stack corruption when adjusting SP. Be a bit more rigorous about clearing the pseudostack on branch/labels. 
--HG--
branch : dtrg-videocore
 2013-06-07 21:25:38 +01:00
David Given
3e0123ca03 Fix treatment of out-of-range values in switch csa. 
--HG--
branch : dtrg-videocore
 2013-06-05 23:57:23 +01:00
David Given
86c6fa2f1e Implement NOT... 
--HG--
branch : dtrg-videocore
 2013-05-30 23:50:19 +01:00
David Given
d3e3e72860 Update from trunk. 
--HG--
branch : dtrg-videocore
 2013-05-29 15:03:48 +01:00
David Given
e0c121d6e6 Use relocation enumerations rather than hard-coded values for relocation types 
(these were causing problems due to the enumeration values having changed).
 2013-05-29 14:11:04 +01:00
David Given
1f36370d87 Implement nop (the C compiler sometimes generates this!). 
--HG--
branch : dtrg-videocore
 2013-05-26 22:54:53 +01:00
David Given
ef25c53c9c Fix bug in ine/dee. 
--HG--
branch : dtrg-videocore
 2013-05-26 18:59:19 +01:00
David Given
366cd10194 Remainders are calculated correctly. printf now works. 
--HG--
branch : dtrg-videocore
 2013-05-26 13:13:58 +01:00
David Given
510888e6d5 .csb now works. 
--HG--
branch : dtrg-videocore
rename : mach/vc4/libem/csa.s => mach/vc4/libem/csb.s
 2013-05-26 13:06:25 +01:00
David Given
6284512b37 Fix erroneous section check (symbols may not have a defined section in pass 1). 
--HG--
branch : dtrg-videocore
 2013-05-26 00:35:15 +01:00
David Given
308d41e083 Added triple-quad load and store (used by the signal stuff). 
--HG--
branch : dtrg-videocore
 2013-05-26 00:22:08 +01:00
David Given
8c21a2ef9b Stop fighting the terrible code and remove the regvar support --- it didn't help much and was a pain. 
--HG--
branch : dtrg-videocore
 2013-05-25 23:58:35 +01:00
David Given
3b07fee160 Major bugfix where instructions weren't being shrunk correctly. (Turns out there's built-in support for doing this, which I hadn't found.) 
--HG--
branch : dtrg-videocore
 2013-05-25 23:26:10 +01:00
David Given
b6680a48cc Disable register variables. The code is a bit worse, but having two stackable registers makes things much easier to understand. 
--HG--
branch : dtrg-videocore
 2013-05-25 13:31:58 +01:00
David Given
d7efb0a32c Implement .csa. 
--HG--
branch : dtrg-videocore
rename : mach/vc4/libem/dummy.s => mach/vc4/libem/csa.s
 2013-05-25 13:31:27 +01:00
David Given
2ee79ab0b2 Encode comparing branch correctly. 
--HG--
branch : dtrg-videocore
 2013-05-25 13:31:01 +01:00
David Given
472f778342 Don't write out constant data as big-endian! Some other cleanups. 
--HG--
branch : dtrg-videocore
 2013-05-25 00:33:38 +01:00
David Given
98a51732ab Various codegen tweaks. 
--HG--
branch : dtrg-videocore
 2013-05-24 17:04:29 +01:00
David Given
2c7ee27206 Double-quads can be loaded and stored (more) correctly. 
--HG--
branch : dtrg-videocore
 2013-05-22 23:55:23 +01:00
David Given
6cbe6e1c4e Better treatment of sign extension. 
--HG--
branch : dtrg-videocore
 2013-05-22 23:12:48 +01:00
David Given
7537c85e0a Generate adds instructions when a shift-and-add is seen (useful for array indexing). 
--HG--
branch : dtrg-videocore
 2013-05-22 21:37:48 +01:00
David Given
cdce394b6c Generate ld rd, (rs) instructions properly. 
--HG--
branch : dtrg-videocore
 2013-05-22 11:02:46 +01:00
David Given
9e556d8b7b Optimise direct access to globals, and incrementing and decrementing locals. 
--HG--
branch : dtrg-videocore
 2013-05-22 10:55:13 +01:00
David Given
08c4334224 Typo fixes. 
--HG--
branch : dtrg-videocore
 2013-05-22 00:44:04 +01:00
David Given
f904465e9c Fix signedness problem that was showing up on ARM. 
--HG--
branch : dtrg-videocore
 2013-05-22 00:16:16 +01:00
David Given
5e9102955c Reworked VC4 relocations and some of the instruction encoding to be actually correct. Now generating what could be real code! 
--HG--
branch : dtrg-videocore
 2013-05-21 23:17:30 +01:00
David Given
1312fe298b Now compiles (incorrectly) the entire libc, libpc, libm2 and libbasic! 
--HG--
branch : dtrg-videocore
 2013-05-21 20:05:26 +01:00
David Given
877e06ed89 Lots more opcodes including float support. Define float and double to be the 
same thing (as the VC4 seems not to have double-precision float support).

--HG--
branch : dtrg-videocore
 2013-05-21 18:16:30 +01:00
David Given
6cdea73e84 Add a lot more opcodes. 
--HG--
branch : dtrg-videocore
 2013-05-20 23:27:45 +01:00
David Given
d6565f4d5b Fix typo. 
--HG--
branch : dtrg-videocore
 2013-05-20 23:27:31 +01:00
David Given
970f2bae62 Major revamp to simplify and use 2op instructions. Better code. Now looks like it may work one day. 
--HG--
branch : dtrg-videocore
 2013-05-20 22:35:12 +01:00
David Given
5082b2a5d7 Add lea instruction. Fix dependency issues. 
--HG--
branch : dtrg-videocore
 2013-05-20 19:56:33 +01:00
David Given
11890026db Push/pop are the right way round. Don't corrup short-form ALU instructions. Correct encoding of push/pop register ranges. 
--HG--
branch : dtrg-videocore
 2013-05-19 23:34:42 +01:00
David Given
76ba0bf6b3 First steps towards a code generator. 
--HG--
branch : dtrg-videocore
 2013-05-19 23:33:42 +01:00
David Given
80f85001fa Correctly emit constants in some ALU instructions. 
--HG--
branch : dtrg-videocore
 2013-05-19 23:19:10 +01:00
David Given
a46ee91859 Fix warning. 
--HG--
branch : dtrg-videocore
 2013-05-19 23:18:36 +01:00