David Given
|
e88670dad4
|
Yikes! Turns out that FPU registers are only 32 bits wide, and doubles are
stored in pairs, just like on the PowerPC!
|
2018-09-09 18:25:00 +02:00 |
|
|
David Given
|
ec46643124
|
Allow the ELF processor flags to be set. Generate MIPS ELF executables, not
PowerPC ones.
|
2018-09-09 14:29:34 +02:00 |
|
|
David Given
|
5dfef6f180
|
Rework relocations again: add RELO2HI and RELO2HISAD for the high two bytes of
a word.
|
2018-09-09 14:11:11 +02:00 |
|
|
David Given
|
95dd6f0141
|
Fix some niggling issues --- we have our first binary now!
|
2018-09-09 12:24:22 +02:00 |
|
|
David Given
|
b3b7c684c6
|
Simplify MIPS relocations. Add RELS2 (for generic high-word relocations). Add
support for MIPS branch-and-jump relocations.
|
2018-09-09 12:23:59 +02:00 |
|
|
David Given
|
0d8d98fd0f
|
Warning fix.
|
2018-09-09 12:22:59 +02:00 |
|
|
David Given
|
d2a1d4dcda
|
Added some very untested csa and csb implementations, based on the PowerPC
ones.
|
2018-09-08 23:12:57 +02:00 |
|
|
David Given
|
75308901bc
|
Added hi[] and lo[] functions to the assembler; fix things enough that we now
get to the point of failing to link programs.
|
2018-09-08 22:42:06 +02:00 |
|
|
David Given
|
379c1a4a3c
|
Rework floating point conversion. Bash enough of the table into workingness
that the libraries build now.
|
2018-09-08 22:06:38 +02:00 |
|
|
David Given
|
d2c14ca44f
|
Precisely one stack hreg gets allocated for each vreg/congruence group for
eviction; this prevents us from having to worry about moving values from stack
slot to stack slot, which is hard.
|
2018-09-08 18:59:55 +02:00 |
|
|
David Given
|
b7a1c96986
|
MIPS appears to hate converting unsigneds to floats and vice versa.
|
2018-09-05 23:53:38 +02:00 |
|
|
David Given
|
fc0b0ae178
|
(Slightly) better errors on phi congruence group mismatches.
|
2018-09-05 23:53:08 +02:00 |
|
|
David Given
|
7fbce066f8
|
We attempt to compile the first library function; we fail.
|
2018-09-05 00:13:01 +02:00 |
|
|
David Given
|
26fe3f7530
|
Added library skeletons.
|
2018-09-05 00:07:07 +02:00 |
|
|
David Given
|
98afb42095
|
Added a boot.o based on the PowerPC one.
|
2018-09-05 00:00:13 +02:00 |
|
|
David Given
|
26c0228b14
|
The examples all compile now (probably incorrectly, and the libc doesn't
compile yet).
|
2018-09-04 23:55:28 +02:00 |
|
|
David Given
|
9d80756253
|
Lots of assembler and rule bugfixing.
|
2018-09-04 23:43:24 +02:00 |
|
|
David Given
|
fe5ca5a85f
|
Added li and la instructions.
|
2018-09-03 22:47:41 +02:00 |
|
|
David Given
|
26f9b4ceae
|
Add in floating point support to the code generator.
|
2018-09-03 22:06:05 +02:00 |
|
|
David Given
|
83cf1be6a8
|
mcgg now checks that registers have at most one type attribute set.
|
2018-09-03 22:03:57 +02:00 |
|
|
David Given
|
f8e71d888b
|
Add some painfully untested FPU instructions.
|
2018-09-02 21:36:09 +02:00 |
|
|
David Given
|
1d6ecddcf4
|
The MIPS backend is still full of holes, and cut-and-pasted PowerPC code, but
is beginning to look like an actual code generator.
|
2018-09-02 18:57:25 +02:00 |
|
|
David Given
|
a023fd8591
|
Better error reporting for unterminated strings.
|
2018-09-02 18:55:44 +02:00 |
|
|
David Given
|
2eaca39322
|
Merge pull request #120 from davidgiven/dtrg-no
Remove the built-in preprocessor in cemcom.ansi
|
2018-09-02 13:15:11 +02:00 |
|
|
David Given
|
b76352de99
|
Remove stray #include.
|
2018-09-02 12:54:53 +02:00 |
|
|
David Given
|
cb983fac44
|
Rip out the built-in preprocessor from cemcom.ansi, now it's no longer used.
|
2018-09-02 12:50:50 +02:00 |
|
|
David Given
|
6931ffa5a4
|
Disable the built-in preprocessor in cemcom.ansi; the external preprocessor is
always run. Fix a bug in block skipping in the preprocessor.
|
2018-09-02 12:39:00 +02:00 |
|
|
David Given
|
f8fc5bc3d8
|
Implement single-line C++-style comments.
Fixes: #118
|
2018-09-02 12:14:59 +02:00 |
|
|
David Given
|
0e9736fdca
|
Run through clang-format before editing.
|
2018-09-02 12:04:33 +02:00 |
|
|
David Given
|
274ed3cb6a
|
Run through clang-format before editing.
|
2018-09-02 11:49:40 +02:00 |
|
|
David Given
|
dd00b81080
|
Run files through clang-format before editing.
|
2018-09-02 11:36:15 +02:00 |
|
|
David Given
|
fa1ba55ad2
|
Convert CRLF into LF on read; this should avoid problems with parsing CRLF files.
Fixes #117.
|
2018-09-02 11:30:20 +02:00 |
|
|
David Given
|
788f439a48
|
Run files through clang-format before editing.
|
2018-09-02 11:16:06 +02:00 |
|
|
David Given
|
4741ed8e14
|
Add a completely non-tested table-based MIPS assembler.
|
2018-09-01 19:35:31 +02:00 |
|
|
David Given
|
bed39e1f4d
|
Merge.
|
2018-09-01 15:34:36 +02:00 |
|
|
David Given
|
1d9f9074d9
|
The default installation location should be /usr/local.
|
2018-09-01 15:34:01 +02:00 |
|
|
David Given
|
7dc4c16521
|
Merge pull request #112 from davidgiven/dtrg-te
Add tea-ci CI for Windows builds
|
2018-09-01 11:49:28 +02:00 |
|
|
David Given
|
6f74f1caf3
|
Disable the msys32 build because it doesn't work (due to brk issues).
|
2018-09-01 11:43:52 +02:00 |
|
|
David Given
|
f09182eb37
|
Another typo fix.
|
2018-09-01 11:34:29 +02:00 |
|
|
David Given
|
269484f64a
|
Typo fix.
|
2018-09-01 11:32:26 +02:00 |
|
|
David Given
|
b57900c638
|
Experiment with a build matrix and msys32.
|
2018-09-01 11:31:45 +02:00 |
|
|
David Given
|
a7719a8fe6
|
Add bison and flex.
|
2018-09-01 11:25:03 +02:00 |
|
|
David Given
|
bc1a639697
|
No luck with ninja --- make should work?
|
2018-09-01 11:23:39 +02:00 |
|
|
David Given
|
e4ba155886
|
Update apt before installing.
|
2018-09-01 11:19:16 +02:00 |
|
|
David Given
|
0a735d43e6
|
Typo fix.
|
2018-09-01 11:18:25 +02:00 |
|
|
David Given
|
e886186890
|
Cygwin setup is very slow, so put sh-on-windows first for testing.
|
2018-09-01 11:17:50 +02:00 |
|
|
David Given
|
d1a00f2f48
|
Let's try sh-on-windows as well.
|
2018-09-01 11:12:14 +02:00 |
|
|
David Given
|
10785e9791
|
msys32 doesn't work; try Cygwin instead.
|
2018-09-01 11:07:28 +02:00 |
|
|
David Given
|
2666268af7
|
Install ninja before building.
|
2018-09-01 11:04:12 +02:00 |
|
|
David Given
|
5377c1cc82
|
Looks like sh-on-windows isn't working.
|
2018-09-01 11:02:48 +02:00 |
|