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riscv64-tok.h: add Zicsr pseudoinstructions, registers

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noneofyourbusiness 2023-12-10 15:22:41 +01:00
parent 3b3c9412ac
commit 5dc241fee1
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1 changed files with 23 additions and 0 deletions
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riscv64-tok.h
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@ -340,6 +340,29 @@
DEF_ASM(csrrwi)
DEF_ASM(csrrsi)
DEF_ASM(csrrci)
/* registers */
DEF_ASM(cycle)
DEF_ASM(fcsr)
DEF_ASM(fflags)
DEF_ASM(frm)
DEF_ASM(instret)
DEF_ASM(time)
/* RV32I-only */
DEF_ASM(cycleh)
DEF_ASM(instreth)
DEF_ASM(timeh)
/* pseudo */
DEF_ASM(csrc)
DEF_ASM(csrci)
DEF_ASM(csrr)
DEF_ASM(csrs)
DEF_ASM(csrsi)
DEF_ASM(csrw)
DEF_ASM(csrwi)
DEF_ASM(frcsr)
DEF_ASM(frrm)
DEF_ASM(fscsr)
DEF_ASM(fsrm)
/* Privileged Instructions */